Recently, research and development of magnetic memories (magnetic random access memories (SOT-MRAMs)) that perform spin orbit torque (SOT) write operations has been actively performed. A memory element included in an SOT-MRAM has a structure in which magnetic tunnel junction (MTJ) elements each having a multilayer structure including a storage layer, a nonmagnetic layer, and a reference layer are disposed on a conductive nonmagnetic layers (also called “SO layers”). The magnetization direction of each storage layer is switched by causing a current to flow through the conductive nonmagnetic layer. A read operation is performed by causing a read current to flow between the conductive nonmagnetic layer and the reference layer through the storage layer and the nonmagnetic layer.
Magnetic memories that perform a write operation using spin transfer torque (STT) are also known (STT-MRAMs). A memory element of an STT-MRAM includes MTJ elements each having a multilayer structure including a storage layer, a nonmagnetic layer, and a reference layer. The magnetization direction of the storage layer is switched by causing a write current to flow between the storage layer and the reference layer via the nonmagnetic layer. A read operation is performed by causing a read current to flow between the storage layer and the reference layer via the nonmagnetic layer.
Since the read current path and the write current path are the same in the STT-MRAM, the element characteristics may vary if the device is miniaturized. Therefore, it is difficult to have enough margins among the read current, the write current, the current of the transistor connected to the MTJ element for selecting the MTJ element, and the breakdown current of the MTJ element by reducing the variations in the respective currents.
In the SOT-MRAM, the read current path is different from the write current path. Therefore margins to deal with the variations in the respective currents are relatively large. Thus, variations of the read current, the current of the transistor connected to the MTJ element for selecting the MTJ element, the breakdown current that may breaks the nonmagnetic layer of the MTJ element, the write current, and the electromigration current flowing through the SO layer may be allowed to some extent. The SOT-M RAM thus may have relatively broad margins to deal with variations in currents even if the memory elements are miniaturized (to improve the capacity of the memory). This is an advantage of the SOT-MRAM to the STT-MRAM.
However, the cell area of the SOT-MRAM including the memory elements is as large as 12 F2, F being the minimum feature size, and the write efficiency (=Δ/Ic) of the SOT-MRAM is about 0.3, which is not so good. Thus, the SOT-MRAM is inferior in the cell area and the write efficiency to the STT-MRAM. These problems need to be solved.
An SOT-MRAM is known, which has a reduced cell area. The SOT-MRAM includes a memory cell in which a string of MTJ elements (memory elements) is disposed on an SO layer. The cell area of the SOT-MRAM with such a structure is reduced to 6.75 F2 per one bit (one memory element), which enables to produce a large-capacity voltage-controlled magnetic memory. In order to employ this structure, however, a voltage assisted magnetic anisotropy control technique, which changes the magnetic anisotropy (coercive force) of the storage layer by applying a voltage to the MTJ element, is preferably used in the SOT write operation.